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NST3904DXV6T1, NST3904DXV6T5 Dual General Purpose Transistor
The NST3904DXV6T1 device is a spin- off of our popular SOT-23/SOT-323 three-leaded device. It is designed for general purpose amplifier applications and is housed in the SOT- 563 six-leaded surface mount package. By putting two discrete devices in one package, this device is ideal for low-power surface mount applications where board space is at a premium. * hFE, 100-300 * Low VCE(sat), 0.4 V * Simplifies Circuit Design * Reduces Board Space * Reduces Component Count * Lead-Free Solder Plating
MAXIMUM RATINGS
Rating Collector - Emitter Voltage Collector - Base Voltage Emitter - Base Voltage Collector Current - Continuous Electrostatic Discharge Symbol VCEO VCBO VEBO IC ESD Value 40 60 6.0 200 HBM>16000, MM>2000 Unit Vdc Vdc Vdc mAdc V
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(3) (2) (1)
Q1
Q2
(4)
(5) NST3946DXV6T1
(6)
54 2 3
1
SOT-563 CASE 463A PLASTIC
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic (One Junction Heated) Total Device Dissipation Derate above 25C Thermal Resistance Junction-to-Ambient Characteristic (Both Junctions Heated) Total Device Dissipation Derate above 25C Thermal Resistance Junction-to-Ambient Junction and Storage Temperature Range 1. FR-4 @ Minimum Pad RqJA TJ, Tstg TA = 25C RqJA TA = 25C Symbol PD Max 357 (Note 1) 2.9 (Note 1) 350 (Note 1) Max 500 (Note 1) 4.0 (Note 1) 250 (Note 1) - 55 to +150 Unit mW mW/C C/W
MA D
MA = Specific Device Code D = Date Code
ORDERING INFORMATION
Device Package SOT-563 SOT-563 Shipping 4 mm pitch 4000/Tape & Reel 2 mm pitch 8000/Tape & Reel
Symbol PD
Unit mW mW/C C/W C
NST3904DXV6T1 NST3904DXV6T5
(c) Semiconductor Components Industries, LLC, 2003
1
March, 2003 - Rev. 0
Publication Order Number: NST3904DXV6T1/D
NST3904DXV6T1, NST3904DXV6T5
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector - Emitter Breakdown Voltage (Note 2) (IC = 1.0 mAdc, IB = 0) Collector - Base Breakdown Voltage (IC = 10 mAdc, IE = 0) Emitter - Base Breakdown Voltage (IE = 10 mAdc, IC = 0) Base Cutoff Current (VCE = 30 Vdc, VEB = 3.0 Vdc) Collector Cutoff Current (VCE = 30 Vdc, VEB = 3.0 Vdc) V(BR)CEO 40 V(BR)CBO 60 V(BR)EBO 6.0 IBL ICEX 50 50 nAdc nAdc Vdc Vdc Vdc
ON CHARACTERISTICS (Note 2)
DC Current Gain (IC = 0.1 mAdc, VCE = 1.0 Vdc) (IC = 1.0 mAdc, VCE = 1.0 Vdc) (IC = 10 mAdc, VCE = 1.0 Vdc) (IC = 50 mAdc, VCE = 1.0 Vdc) (IC = 100 mAdc, VCE = 1.0 Vdc) Collector - Emitter Saturation Voltage (IC = 10 mAdc, IB = 1.0 mAdc) (IC = 50 mAdc, IB = 5.0 mAdc) Base - Emitter Saturation Voltage (IC = 10 mAdc, IB = 1.0 mAdc) (IC = 50 mAdc, IB = 5.0 mAdc) hFE 40 70 100 60 30 VCE(sat) VBE(sat) 0.65 0.85 0.95 0.2 0.3 Vdc 300 Vdc -
SMALL- SIGNAL CHARACTERISTICS
Current - Gain - Bandwidth Product (IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz) Output Capacitance (VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz) Input Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) 2. Pulse Test: Pulse Width 300 s; Duty Cycle 2.0%. fT 300 Cobo Cibo 8.0 4.0 pF pF MHz
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NST3904DXV6T1, NST3904DXV6T5
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) (Continued)
Characteristic Input Impedance (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) Voltage Feedback Ratio (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) Small - Signal Current Gain (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) Output Admittance (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) Noise Figure (VCE = 5.0 Vdc, IC = 100 mAdc, RS = 1.0 k , f = 1.0 kHz) Symbol hie 1.0 2.0 hre 0.5 0.1 hfe 100 100 hoe 1.0 3.0 NF 5.0 4.0 40 60 dB 400 400 mmhos 8.0 10 10 12 X 10- 4 Min Max Unit k
SWITCHING CHARACTERISTICS
Delay Time Rise Time Storage Time Fall Time (VCC = 3.0 Vdc, VBE = - 0.5 Vdc) (IC = 10 mAdc, IB1 = 1.0 mAdc) (VCC = 3.0 Vdc, IC = 10 mAdc) (IB1 = IB2 = 1.0 mAdc) td tr ts tf 35 35 200 50 ns ns
DUTY CYCLE = 2% 300 ns
+3 V +10.9 V 10 k 275
10 < t1 < 500 ms DUTY CYCLE = 2%
t1
+3 V +10.9 V 275 10 k 1N916 Cs < 4 pF*
-0.5 V < 1 ns
0 Cs < 4 pF* -9.1 V < 1 ns
* Total shunt capacitance of test jig and connectors
Figure 1. Delay and Rise Time Equivalent Test Circuit
Figure 2. Storage and Fall Time Equivalent Test Circuit
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NST3904DXV6T1, NST3904DXV6T5
TYPICAL TRANSIENT CHARACTERISTICS
TJ = 25C TJ = 125C 10 7.0 CAPACITANCE (pF) 5.0 Cibo 3.0 2.0 Cobo
1.0 0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
20 30 40
REVERSE BIAS VOLTAGE (VOLTS)
Figure 3. Capacitance
500 300 200 100 70 50 30 20 10 7 5 td @ VOB = 0 V 1.0 2.0 3.0 5.0 7.0 10 20 30 IC, COLLECTOR CURRENT (mA) 40 V 15 V 2.0 V 50 70 100 200 IC/IB = 10 500 300 200 t r, RISE TIME (ns) 100 70 50 30 20 10 7 5 VCC = 40 V IC/IB = 10
TIME (ns)
tr @ VCC = 3.0 V
1.0
2.0 3.0
5.0 7.0 10
20
30
50 70 100
200
IC, COLLECTOR CURRENT (mA)
Figure 4. Turn - On Time
500 300 200 t s, STORAGE TIME (ns) 100 70 50 30 20 10 7 5 IC/IB = 20 IC/IB = 10 IC/IB = 20 IC/IB = 10 500 300 200 t f , FALL TIME (ns)
Figure 5. Rise Time
ts = ts - 1/8 tf IB1 = IB2
VCC = 40 V IB1 = IB2 IC/IB = 20
100 70 50 30 20 10 7 5 IC/IB = 10
1.0
2.0 3.0
5.0 7.0 10
20
30
50 70 100
200
1.0
2.0 3.0
5.0 7.0 10
20
30
50 70 100
200
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 6. Storage Time
Figure 7. Fall Time
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NST3904DXV6T1, NST3904DXV6T5
TYPICAL AUDIO SMALL- SIGNAL CHARACTERISTICS NOISE FIGURE VARIATIONS
(VCE = 5.0 Vdc, TA = 25C, Bandwidth = 1.0 Hz)
12 10 NF, NOISE FIGURE (dB) 8 6 4 2 0 0.1 SOURCE RESISTANCE = 500 W IC = 100 mA 0.2 0.4 1.0 2.0 4.0 10 20 40 100 SOURCE RESISTANCE = 200 W IC = 1.0 mA NF, NOISE FIGURE (dB) SOURCE RESISTANCE = 200 W IC = 0.5 mA SOURCE RESISTANCE = 1.0 k IC = 50 mA 14 f = 1.0 kHz 12 10 8 6 4 2 0 0.1 0.2 0.4 1.0 2.0 4.0 10 20 40 100 IC = 100 mA IC = 1.0 mA
IC = 0.5 mA IC = 50 mA
f, FREQUENCY (kHz)
RS, SOURCE RESISTANCE (k OHMS)
Figure 8. Noise Figure
Figure 9. Noise Figure
h PARAMETERS
(VCE = 10 Vdc, f = 1.0 kHz, TA = 25C)
300 hoe, OUTPUT ADMITTANCE (m mhos) 5.0 10 100 50 20 10 5 2 1 0.1 0.2 0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 10
h fe , CURRENT GAIN
200
100 70 50
30
0.1
0.2
0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA)
Figure 10. Current Gain
20 h ie , INPUT IMPEDANCE (k OHMS) 10 5.0 hre , VOLTAGE FEEDBACK RATIO (x 10 -4) 10 7.0 5.0 3.0 2.0
Figure 11. Output Admittance
2.0 1.0 0.5 0.2
1.0 0.7 0.5 0.1 0.2 0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 10
0.1
0.2
0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA)
5.0
10
Figure 12. Input Impedance
Figure 13. Voltage Feedback Ratio
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NST3904DXV6T1, NST3904DXV6T5
TYPICAL STATIC CHARACTERISTICS
h FE, DC CURRENT GAIN (NORMALIZED) 2.0 TJ = +125C 1.0 0.7 0.5 0.3 0.2 -55 C +25C VCE = 1.0 V
0.1 0.1
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
20
30
50
70
100
200
IC, COLLECTOR CURRENT (mA)
Figure 14. DC Current Gain
VCE, COLLECTOR EMITTER VOLTAGE (VOLTS)
1.0 TJ = 25C 0.8 IC = 1.0 mA 10 mA 30 mA 100 mA
0.6 0.4
0.2 0 0.01
0.02
0.03
0.05
0.07
0.1
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
IB, BASE CURRENT (mA)
Figure 15. Collector Saturation Region
1.2 TJ = 25C 1.0 V, VOLTAGE (VOLTS) 0.8 VBE @ VCE =1.0 V 0.6 0.4 VCE(sat) @ IC/IB =10 0.2 0 VBE(sat) @ IC/IB =10 COEFFICIENT (mV/ C)
1.0 0.5 qVC FOR VCE(sat) 0 -0.5 -55 C TO +25C -1.0 +25C TO +125C -1.5 -2.0 qVB FOR VBE(sat) -55 C TO +25C +25C TO +125C
1.0
2.0
5.0
10
20
50
100
200
0
20
40
60
80
100
120
140
160
180 200
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 16. "ON" Voltages
Figure 17. Temperature Coefficients
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NST3904DXV6T1, NST3904DXV6T5 INFORMATION FOR USING THE SOT-563 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection
0.3 0.45 1.0 1.35 0.5 0.5
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
Dimensions in mm
SOT-563 SOT-563 POWER DISSIPATION The power dissipation of the SOT-563 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT-563 package, PD can be calculated as follows:
PD = TJ(max) - TA RJA SOLDERING PRECAUTIONS
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 150 milliwatts.
PD = 150C - 25C 833C/W = 150 milliwatts
The 833C/W for the SOT-563 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 150 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT-563 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad(R). Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. * The soldering temperature and time shall not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device
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NST3904DXV6T1, NST3904DXV6T5
PACKAGE DIMENSIONS
SOT-563, 6 LEAD CASE 463A-01 ISSUE O
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. MILLIMETERS MIN MAX 1.50 1.70 1.10 1.30 0.50 0.60 0.17 0.27 0.50 BSC 0.08 0.18 0.10 0.30 1.50 1.70 INCHES MIN MAX 0.059 0.067 0.043 0.051 0.020 0.024 0.007 0.011 0.020 BSC 0.003 0.007 0.004 0.012 0.059 0.067
A -X-
C K
4
6
5
1
2
3
B -Y-
S
D G
5 6 PL M
J XY
0.08 (0.003)
DIM A B C D G J K S
STYLE 1: PIN 1. 2. 3. 4. 5. 6.
EMITTER 1 BASE 1 COLLECTOR 2 EMITTER 2 BASE 2 COLLECTOR 1
STYLE 2: PIN 1. 2. 3. 4. 5. 6.
EMITTER 1 EMITTER2 BASE 2 COLLECTOR 2 BASE 1 COLLECTOR 1
STYLE 3: PIN 1. 2. 3. 4. 5. 6.
CATHODE 1 CATHODE 1 ANODE/ANODE 2 CATHODE 2 CATHODE 2 ANODE/ANODE 1
STYLE 4: PIN 1. 2. 3. 4. 5. 6.
COLLECTOR COLLECTOR BASE EMITTER COLLECTOR COLLECTOR
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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NST3904DXV6T1/D

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